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Amorphous oxide semiconductors (AOSs) have attracted considerable attention because of their high carrier density, low thermal budget, and large bandgap. However, the high electron density in AOSs hinders their ability to turn off effectively, resulting in a trade-off between the threshold voltage () and mobility (μ). In this work, we report high-performance dual-gate (DG) indium gallium oxide (IGO) TFTs utilizing localized O treatment to effectively passivate the oxygen vacancies (V) in the channel region of IGO TFTs, thereby achieving a positive and high mobility. The 100 nm short-channel length () enhancement-mode IGO DG TFT exhibits an ideal subthreshold slope (SS) of 63 mV/dec, a maximum drain current of 1.36 mA/μm, and a record high transconductance () of 1008 μS/μm. This study demonstrates a novel method to overcome the trade-off between and μ, showing that IGO DG-TFTs are promising transistors for enabling high-performance monolithic three-dimensional (M3D) integrated circuits.
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http://dx.doi.org/10.1021/acs.nanolett.5c01059 | DOI Listing |
Nano Lett
May 2025
Wuhan National High Magnetic Field Center, School of Integrated Circuits, Huazhong University of Science and Technology, Wuhan 430074, China.
Amorphous oxide semiconductors (AOSs) have attracted considerable attention because of their high carrier density, low thermal budget, and large bandgap. However, the high electron density in AOSs hinders their ability to turn off effectively, resulting in a trade-off between the threshold voltage () and mobility (μ). In this work, we report high-performance dual-gate (DG) indium gallium oxide (IGO) TFTs utilizing localized O treatment to effectively passivate the oxygen vacancies (V) in the channel region of IGO TFTs, thereby achieving a positive and high mobility.
View Article and Find Full Text PDFACS Appl Mater Interfaces
February 2025
Laboratory of Atomic-scale and Micro & Nano Manufacturing, Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, China.
Different application domains impose diverse and often conflicting requirements on the optoelectronic performance of metal oxide semiconductor (MOS) thin-film transistors (TFTs). These varying demands present substantial challenges in the selection of TFT materials and the optimization of device performance. This study begins by examining three primary application areas for TFTs: display drivers, photodetectors, and optoelectronic synapses.
View Article and Find Full Text PDFACS Appl Mater Interfaces
January 2025
Department of Electronic Engineering, Hanyang University, Seoul 04763, Republic of Korea.
For potential application in advanced memory devices such as dynamic random-access memory (DRAM) or NAND flash, nanolaminated indium oxide (In-O) and gallium oxide (Ga-O) films with five different vertical cation distributions were grown and investigated by using a plasma-enhanced atomic layer deposition (PEALD) process. Specifically, this study provides an in-depth examination of how the control of individual layer thicknesses in the nanolaminated (NL) IGO structure impacts not only the physical and chemical properties of the thin film but also the overall device performance. To eliminate the influence of the cation composition ratio and overall thickness on the IGO thin film, these parameters were held constant across all conditions.
View Article and Find Full Text PDFACS Appl Mater Interfaces
May 2024
Department of Electronic Engineering, Hanyang University, Seoul 04763, South Korea.
Drain-induced barrier lowering (DIBL) is one of the most critical obstacles degrading the reliability of integrated circuits based on miniaturized transistors. Here, the effect of a crystallographic structure change in InGaO [indium gallium oxide (IGO)] thin-films on the DIBL was investigated. Preferentially oriented IGO (po-IGO) thin-film transistors (TFTs) have outstanding device performances with a field-effect mobility of 81.
View Article and Find Full Text PDFSci Rep
April 2024
Department of Electronic Engineering, Hanyang University, Seoul, 04763, Republic of Korea.
In this paper, high-performance indium gallium oxide (IGO) thin-film transistor (TFT) with a double-gate (DG) structure was developed using an atomic layer deposition route. The device consisting of 10-nm-thick IGO channel and 2/48-nm-thick SiO/HfO dielectric was designed to be suitable for a display backplane in augmented and virtual reality applications. The fabricated DG TFTs exhibit outstanding device performances with field-effect mobility (μ) of 65.
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