MoS2 transistors fabricated via plasma-assisted nanoprinting of few-layer MoS2 flakes into large-area arrays.

ACS Nano

Department of Mechanical Engineering, University of Michigan, 2011 W.E. Lay Automotive Laboratory, 1231 Beal Avenue, Ann Arbor, Michigan 48109, USA.

Published: July 2013


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Article Abstract

Large-area few-layer-MoS2 device arrays are desirable for scale-up applications in nanoelectronics. Here we present a novel approach for producing orderly arranged, pristine few-layer MoS2 flakes, which holds significant potential to be developed into a nanomanufacturing technology that can be scaled up. We pattern bulk MoS2 stamps using lithographic techniques and subsequently transfer-print prepatterned MoS2 features onto pristine and plasma-charged SiO2 substrates. Our work successfully demonstrates the transfer printing of MoS2 flakes into ordered arrays over cm(2)-scale areas. Especially, the MoS2 patterns printed on plasma-charged substrates feature a regular edge profile and a narrow distribution of MoS2 flake thicknesses (i.e., 3.0 ± 1.9 nm) over cm(2)-scale areas. Furthermore, we experimentally show that our plasma-assisted printing process can be generally used for producing other emerging atomically layered nanostructures (e.g., graphene nanoribbons). We also demonstrate working n-type transistors made from printed MoS2 flakes that exhibit excellent properties (e.g., ON/OFF current ratio 10(5)-10(7), field-effect mobility on SiO2 gate dielectrics 6 to 44 cm(2)/(V s)) as well as good uniformity of such transistor parameters over a large area. Finally, with additional plasma treatment processes, we also show the feasibility of creation of p-type transistors as well as pn junctions in MoS2 flakes. This work lays an important foundation for future scale-up nanoelectronic applications of few-layer-MoS2 micro- and nanostructures.

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http://dx.doi.org/10.1021/nn401093uDOI Listing

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