Technique of mask optimization for achieving the maximal effective litho-CPW.

Achieving a large lithography process window (PW) via computational lithography is a crucial prerequisite for ensuring adequate product yield in advanced-node integrated-circuit manufacturing technologies. However, as the critical dimensions of patterns continue to shrink, a chip-level qualified common process window (CPW) necessitates multiple rounds of highly time-consuming iterations of source mask co-optimization (SMO). To ensure a sufficient CPW for yield improvement while reducing the iterations of SMO, this paper presents what we believe to be a novel mask optimization (MO) approach aimed at attaining the maximum effective CPW in every iteration. First, an optimized light source is acquired through SMO and then utilized in subsequent CPW-friendly MO steps. After optimizing all the individual mask patterns, the optimal exposure dose and anchor pattern corresponding to the maximum effective CPW are corrected. Finally, the cost function for MO is updated, and the CPW-friendly MO is executed to ultimately achieve the maximal effective CPW. In the experimental cases studied in this paper, the proposed MO technique, which incorporates corrections for exposure dose, anchor pattern, and cost functions, achieves an 8.79% improvement in CPW compared to the scenario where only mask patterns are considered during MO. The inefficiency caused by the repeated re-optimization of SMO due to insufficient CPW in each iteration is the bottleneck of the source optimization and determination process. This method can further automate the update of the MO process, achieving the maximum CPW result in each MO iteration, significantly shortening the turnaround time of the SMO-MO full procedure, and further increasing full-chip CPW.