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Recent advances in memory technologies, devices, and materials have shown great potential for integration into neuromorphic electronic systems. However, a significant gap remains between the development of these materials and the realization of large-scale, fully functional systems. One key challenge is determining which devices and materials are best suited for specific functions and how they can be paired with complementary metal-oxide-semiconductor circuitry. To address this, we present a mixed-signal neuromorphic architecture designed to explore the integration of on-chip learning circuits and novel two- and three-terminal devices. The chip serves as a platform to bridge the gap between silicon-based neuromorphic computation and the latest advancements in emerging devices. In this paper, we demonstrate the readiness of the architecture for device integration through comprehensive measurements and simulations. The processor provides a practical system for testing bio-inspired learning algorithms alongside emerging devices, establishing a tangible link between brain-inspired computation and cutting-edge device research.
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http://dx.doi.org/10.1038/s41467-025-61576-6 | DOI Listing |
Nanophotonics
August 2025
School of Science, Minzu University of China, Beijing 100081, China.
Optical neural networks (ONNs) have demonstrated unique advantages in overcoming the limitations of traditional electronic computing through their inherent physical properties, including high parallelism, ultra-wide bandwidth, and low power consumption. As a crucial implementation of ONNs, on-chip diffractive optical neural network (DONN) offers an effective solution for achieving highly integrated and energy-efficient machine learning tasks. Notably, wavelength, as a fundamental degree of freedom in optical field manipulation, exhibits multidimensional multiplexing capabilities that can significantly enhance computational parallelism.
View Article and Find Full Text PDFIEEE Trans Comput Biol Bioinform
August 2025
The development of small DNA sequencers offers a transformative opportunity for portable genomics. However, current systems lack integrated bioinformatics computing and instead rely on bulky external systems. To address this limitation, we propose an embedded System-on-Chip (SoC) architecture aimed at mobile DNA sequencing applications, representing an initial step towards a fully integrated bioinformatics solution.
View Article and Find Full Text PDFSci Rep
August 2025
System on Chip (SoC) Lab, Department of Computer & Information Engineering, Khalifa University of Science & Technology, 127788, Abu Dhabi, UAE.
The Physical Unclonable Function (PUF) is a security mechanism that generates secret keys by capitalizing on inherent physical variations in a device to produce a distinctive response. Given the prevalent incorporation of power management units (PMUs) in current System-on-Chip devices to meet the rising demands for energy efficiency and optimal power utilization, this study proposes the utilization of existing components, specifically the voltage regulator within the PMU, to enhance the PUF. The system has been designed in 22-nm FDSOI technology.
View Article and Find Full Text PDFNanophotonics
August 2025
Department of Electronic Engineering, Tsinghua University, Beijing 100084, China.
On-chip computing metasystems composed of multilayer metamaterials have the potential to become the next-generation computing hardware endowed with light-speed processing ability and low power consumption but are hindered by current design paradigms. To date, neither numerical nor analytical methods can balance efficiency and accuracy of the design process. To address the issue, a physics-inspired deep learning architecture termed electromagnetic neural network (EMNN) is proposed to enable an efficient, reliable, and flexible paradigm of inverse design.
View Article and Find Full Text PDFThis study introduces a hybrid, integrated two-dimensional multi-layer optical phased array architecture that is characterized by its compactness, low loss, high performance, and versatility. It is suitable for applications ranging from space communication to sensor integration. We have delineated the essential requirements for cost-effective, miniaturized, and widely applicable heterostructure silicon photonics and highlighted the benefits of this architectural approach.
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