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Understanding the electrical and microstructural aspects of contact formation at nanoscale is essential for the realization of low-resistance metallization suitable for the next generation of nanowire based devices. In this study, we present detailed electrical and microstructural characteristics of Ti/Al/Ti/Au metal contacts to p-type Si nanowires (SiNWs) annealed at various temperatures. Focused ion beam cross-sectioning techniques and scanning transmission electron microscopy (STEM) were used to determine the microstructure of the source/drain metal contacts of working SiNW field-effect transistors (FETs) annealed for 30 s in the 450-850 °C temperature range in inert atmosphere. Formation of titanium silicides is observed at the metal/semiconductor interface after the 750 °C anneal. Extensive Si out-diffusion from the nanowire after the 750 °C anneal led to Kirkendall void formation. Annealing at 850 °C led to almost complete out-diffusion of Si from the nanowire core. Devices with 550 °C annealed contacts had linear electrical characteristics; whereas the devices annealed at 750 °C had the best characteristics in terms of linearity, symmetric behavior, and yield. Devices annealed at 850 °C had poor yield, which can be directly attributed to the microstructure of the contact region observed in STEM.
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http://dx.doi.org/10.1088/0957-4484/22/7/075206 | DOI Listing |
J Phys Condens Matter
September 2025
Department of Physics, Jishou University, Renmin South Road, Jishou, Hunan, 416000, CHINA.
Based on the first-principles calculations, we theoretically investigate the electronic structure, interfacial and optical properties of the tellurene/ZnSe (namely α- and γ-Te/ZnSe) van der Waals heterostructures (vdWHs). In the most stable stacking pattern, the α-Te/ZnSe vdWH exhibits an indirect band gap of 0.41 eV and forms a type-I band alignment, while the γ-Te/ZnSe vdWH possesses a p-type Schottky contact with a favorable Schottky barrier height of 0.
View Article and Find Full Text PDFSmall Methods
September 2025
Department of Materials Science and Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, 44919, Republic of Korea.
Monolithic perovskite/silicon tandem (PST) solar cells are rapidly emerging as next-generation solar cells with significant potential for commercialization. This study presents a proof of concept for a silicon diffused junction-based PST cell, utilizing a passivated emitter rear contact (PERC) cell with a low-temperature (<200 °C) laser-fired contact process to minimize thermal damage. By introducing amorphous silicon to the emitter surface of PERC bottom cell, the open circuit voltage (V) improve from 0.
View Article and Find Full Text PDFUsing Density Functional Theory (DFT) calculations, we explored the electronic band structure and contact type (Schottky and Ohmic) at the interface of VS-BGaX (X = S, Se) metal-semiconductor (MS) van der Waals heterostructures (vdWHs). The thermal and dynamical stabilities of the investigated systems were systematically validated using energy-strain analysis, molecular dynamics (AIMD) simulations, as well as binding energy and phonon spectrum calculations. After analyzing the band structure, VS-BGaX (X = S, Se) MS vdWHs metallic behavior with type-III band alignment is revealed.
View Article and Find Full Text PDFPhys Chem Chem Phys
August 2025
The Key Laboratory of Micro-nano Energy Materials and Application Technologies, University of Hunan Province; College of Physics and Electronic Engineering, Hengyang Normal University, Hengyang 421002, China.
For high-performance nanoelectronic devices, choosing the appropriate and reliable electrode contact material is of vital importance. Through first-principles calculations, we have systematically investigated the geometric structural stability and electronic contact properties between monolayer 2H-phase ZrI and two-dimensional Dirac semi-metals. The results indicate that ZrI/semi-metal heterostructures are highly stable.
View Article and Find Full Text PDFMater Horiz
August 2025
Department of Electrical and Electronic Engineering, Joongbu University, Goyang, 10279, Korea.
Copper iodide (CuI), identified as a promising p-type semiconductor with solution processability, has recently gained significant interest. However, the defects and vacancy states of CuI that critically correspond to the performance of transistors are rarely explored. In this work, we propose a synergistic processing strategy for defect engineering at the buried interface of CuI thin film transistors (TFTs).
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