Probing the Effects of the First Atomic Layer on the Dynamic Behavior of Sub-2 nm MgO/AlO Memristors.

As electronic devices continue to scale down from the current sub-5 nm range, atomic-scale control of defects becomes increasingly crucial to suppressing their impact on the physical properties of the devices. Memristors present an excellent example of a nonlinear and dynamic device with high speed and endurance required for electronic applications ranging from neuromorphic computing to nonvolatile memories. Herein we investigate the impact of atomic defects in sub-2 nm thick MgO/AlO atomic layer stack (ALS) memristors that use an M1 (switching layer)/M2 (oxygen vacancy reservoir layer) bilayer structure grown using atomic layer deposition (). Intriguingly, we revealed a direct correlation of the atomic defects in the M2 layer with the memristor dynamic behavior using combined analysis of scanning tunneling spectroscopy () on the M2 layer and characterization on the memristors. Specifically, incomplete coverage of the first ALD atomic layer of M2 on the electrode yields defects at the M2/electrode interface. Despite the monotonic increase of ALD coverage, by almost 3-fold from ∼30% to >90%, at completion of the M2 layer of ∼0.7 nm in thickness, the impact of the defects on the M2/electrode interface has been found to be detrimental to both memristor switching speed and endurance. Guided by atomistic simulation, we addressed the issue of interface defects via tuning of the Al surface hydroxylation to increase the first atomic layer ALD coverage to ∼75%, leading to improved memristor switching speed and endurance by several orders of magnitude. These findings shed light on the correlation between the atomic defects and the dynamic behavior of sub-2 nm memristors and the importance of minimizing the atomic defects in memristors for future electronic applications.