98%
921
2 minutes
20
The increasing complexity and cost of manufacturing monolithic chips have driven the semiconductor industry toward chiplet-based designs, where smaller, modular chiplets are integrated onto a single interposer. While chiplet architectures offer significant advantages, such as improved yields, design flexibility, and cost efficiency, they introduce new security challenges in the horizontal hardware manufacturing supply chain. These challenges include risks of hardware Trojans, cross-die side-channel and fault injection attacks, probing of chiplet interfaces, and intellectual property theft. To address these concerns, this paper presents ChipletQuake, a novel on-chiplet framework for verifying the physical security and integrity of adjacent chiplets during the post-silicon stage. By sensing the impedance of the power delivery network (PDN) of the system, ChipletQuake detects tamper events in the interposer and neighboring chiplets without requiring any direct signal interface or additional hardware components. Fully compatible with the digital resources of FPGA-based chiplets, this framework demonstrates the ability to identify the insertion of passive and subtle malicious circuits, providing an effective solution to enhance the security of chiplet-based systems. To validate our claims, we showcase how our framework detects hardware Trojans and interposer tampering.
Download full-text PDF |
Source |
---|---|
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC12349434 | PMC |
http://dx.doi.org/10.3390/s25154861 | DOI Listing |
Sensors (Basel)
August 2025
Computer Science and Engineering, University of South Florida, Tampa, FL 33620, USA.
Integrated circuits are the core of a cyber-physical system, where tens of billions of components are integrated into a tiny silicon chip to conduct complex functions. To maximize utilities, the design and manufacturing life cycle of integrated circuits rely on numerous untrustworthy third parties, forming a global supply chain model. At the same time, this model produces unpredictable and catastrophic issues, threatening the security of individuals and countries.
View Article and Find Full Text PDFSensors (Basel)
August 2025
Worcester Polytechnic Institute, Worcester, MA 01609, USA.
The increasing complexity and cost of manufacturing monolithic chips have driven the semiconductor industry toward chiplet-based designs, where smaller, modular chiplets are integrated onto a single interposer. While chiplet architectures offer significant advantages, such as improved yields, design flexibility, and cost efficiency, they introduce new security challenges in the horizontal hardware manufacturing supply chain. These challenges include risks of hardware Trojans, cross-die side-channel and fault injection attacks, probing of chiplet interfaces, and intellectual property theft.
View Article and Find Full Text PDFSensors (Basel)
July 2025
Electrical and Computer Engineering Department, Worcester Polytechnic Institute, Worcester, MA 01609, USA.
Stealthy chip-level tamper attacks, such as hardware Trojan insertions or security-critical circuit modifications, can threaten modern microelectronic systems' security. While traditional inspection and side-channel methods offer potential for tamper detection, they may not reliably detect all forms of attacks and often face practical limitations in terms of scalability, accuracy, or applicability. This work introduces a non-invasive, contactless tamper detection method employing a complementary split-ring resonator (CSRR).
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
RWTH Aachen University, Aachen, Germany.
The MiG-V was designed for high-security applications and is the first commercially available logic-locked RISC-V processor on the market. In this context, logic locking was used to protect the RISC-V processor design during the untrusted manufacturing process by using key-driven logic gates to obfuscate the original design. Although this method defends against malicious modifications, such as hardware Trojans, logic locking's impact on the RISC-V processor's data confidentiality during runtime has not been thoroughly examined.
View Article and Find Full Text PDFSci Rep
December 2024
Electronic Engineering College, Heilongjiang University, Harbin, 150080, China.
With the rapid development of the semiconductor industry, Hardware Trojans (HT) as a kind of malicious function that can be implanted at will in all processes of integrated circuit design, manufacturing, and deployment have become a great threat in the field of hardware security. Side-channel analysis is widely used in the detection of HT due to its high efficiency, non-contact nature, and accuracy. In this paper, we propose a framework for HT detection based on contrastive learning using power consumption information in unsupervised or weakly supervised scenarios.
View Article and Find Full Text PDF