High Mobility Transistors and Flexible Optical Synapses Enabled by Wafer-Scale Chemical Transformation of Pt-Based 2D Layers.

Electronic devices employing two-dimensional (2D) van der Waals (vdW) transition-metal dichalcogenide (TMD) layers as semiconducting channels often exhibit limited performance (e.g., low carrier mobility), in part, due to their high contact resistances caused by interfacing non-vdW three-dimensional (3D) metal electrodes. Herein, we report that this intrinsic contact issue can be efficiently mitigated by forming the 2D/2D in-plane junctions of 2D semiconductor channels seamlessly interfaced with 2D metal electrodes. For this, we demonstrated the selectively patterned conversion of semiconducting 2D PtSe (channels) to metallic 2D PtTe (electrodes) layers by employing a wafer-scale low-temperature chemical vapor deposition (CVD) process. We investigated a variety of field-effect transistors (FETs) employing wafer-scale CVD-2D PtSe/2D PtTe heterolayers and identified that silicon dioxide (SiO) top-gated FETs exhibited an extremely high hole mobility of ∼120 cm V s at room temperature, significantly surpassing performances with previous wafer-scale 2D PtSe-based FETs. The low-temperature nature of the CVD method further allowed for the direct fabrication of wafer-scale arrays of 2D PtSe/2D PtTe heterolayers on polyamide (PI) substrates, which intrinsically displayed optical pulse-induced artificial synaptic behaviors. This study is believed to vastly broaden the applicability of 2D TMD layers for next-generation, high-performance electronic devices with unconventional functionalities.