New PEDOT Derivatives Electrocoated on Silicon Nanowires Protected with ALD Nanometric Alumina for Ultrastable Microsupercapacitors.

This work deals with electroactive conducting polymers (ECPs) used as a complementary component on purely capacitive silicon nanowires protected by a 3 nm alumina layer. Accordingly, in this work, we use a fast and simple deposition method to create a pseudocapacitive material based on the electropolymerization in aqueous micellar media (SDS and SDBS 0.01 M) of hydroxymethyl-EDOT (EDOT-OH) onto 3 nm alumina-coated silicon nanowires (Al@SiNWs).

Enhancing the incorporation of Sn in vapor-liquid-solid GeSn nanowires by modulation of the droplet composition.

We report on the influence of the liquid droplet composition on the Sn incorporation in GeSn nanowires (NWs) grown by the vapor-liquid-solid (VLS) mechanism with different catalysts. The variation of the NW growth rate and morphology with the growth temperature is investigated and 400 °C is identified as the best temperature to grow the longest untapered NWs with a growth rate of 520 nm min. When GeSn NWs are grown with pure Au droplets, we observe a core-shell like structure with a low Sn concentration of less than 2% in the NW core regardless of the growth temperature.

Reversible Al Propagation in Si Ge Nanowires: Implications for Electrical Contact Formation.

While reversibility is a fundamental concept in thermodynamics, most reactions are not readily reversible, especially in solid-state physics. For example, thermal diffusion is a widely known concept, used among others to inject dopants into the substitutional positions in the matrix and improve device properties. Typically, such a diffusion process will create a concentration gradient extending over increasingly large regions, without possibility to reverse this effect.

Impact of droplet composition on the nucleation rate and morphology of vapor-liquid-solid GeSn nanowires.

It is well-known that the chemical potential which drives the vapor-liquid-solid growth of semiconductor nanowires is strongly affected by the liquid phase composition. Here, we investigate theoretically how the droplet composition influences the nucleation of Au-catalyzed GeSn nanowires on Ge(111) and Si(111) substrates. We compare the chemical potentials in an Au-Ge-Sn catalyst droplet before and after adding Ga and/or Si atoms.

In Situ Transmission Electron Microscopy Analysis of Aluminum-Germanium Nanowire Solid-State Reaction.

To fully exploit the potential of semiconducting nanowires for devices, high quality electrical contacts are of paramount importance. This work presents a detailed in situ transmission electron microscopy (TEM) study of a very promising type of NW contact where aluminum metal enters the germanium semiconducting nanowire to form an extremely abrupt and clean axial metal-semiconductor interface. We study this solid-state reaction between the aluminum contact and germanium nanowire in situ in the TEM using two different local heating methods.

Measurement of anisotropic thermal conductivity of a dense forest of nanowires using the 3 method.

The 3 method is a dynamic measurement technique developed for determining the thermal conductivity of thin films or semi-infinite bulk materials. A simplified model is often applied to deduce the thermal conductivity from the slope of the real part of the ac temperature amplitude as a function of the logarithm of frequency, which in-turn brings a limitation on the kind of samples under observation. In this work, we have measured the thermal conductivity of a forest of nanowires embedded in nanoporous alumina membranes using the 3 method.

Tailoring Strain and Morphology of Core-Shell SiGe Nanowires by Low-Temperature Ge Condensation.

Selective oxidation of the silicon element of silicon germanium (SiGe) alloys during thermal oxidation is a very important and technologically relevant mechanism used to fabricate a variety of microelectronic devices. We develop here a simple integrative approach involving vapor-liquid-solid (VLS) growth followed by selective oxidation steps to the construction of core-shell nanowires and higher-level ordered systems with scalable configurations. We examine the selective oxidation/condensation process under nonequilibrium conditions that gives rise to spontaneous formation of core-shell structures by germanium condensation.

Atomic Layer Deposition Alumina-Passivated Silicon Nanowires: Probing the Transition from Electrochemical Double-Layer Capacitor to Electrolytic Capacitor.

Silicon nanowires were coated by a 1-5 nm thin alumina layer by atomic layer deposition (ALD) in order to replace poorly reproducible and unstable native silicon oxide by a highly conformal passivating alumina layer. The surface coating enabled probing the behavior of symmetric devices using such electrodes in the EMI-TFSI electrolyte, allowing us to attain a large cell voltage up to 6 V in ionic liquid, together with very high cyclability with less than 4% capacitance fade after 10 charge/discharge cycles. These results yielded fruitful insights into the transition between an electrochemical double-layer capacitor behavior and an electrolytic capacitor behavior.

Designing 3D Multihierarchical Heteronanostructures for High-Performance On-Chip Hybrid Supercapacitors: Poly(3,4-(ethylenedioxy)thiophene)-Coated Diamond/Silicon Nanowire Electrodes in an Aprotic Ionic Liquid.

A versatile and robust hierarchically multifunctionalized nanostructured material made of poly(3,4-(ethylenedioxy)thiophene) (PEDOT)-coated diamond@silicon nanowires has been demonstrated to be an excellent capacitive electrode for supercapacitor devices. Thus, the electrochemical deposition of nanometric PEDOT films on diamond-coated silicon nanowire (SiNW) electrodes using N-methyl-N-propylpyrrolidinium bis((trifluoromethyl)sulfonyl)imide ionic liquid displayed a specific capacitance value of 140 F g(-1) at a scan rate of 1 mV s(-1). The as-grown functionalized electrodes were evaluated in a symmetric planar microsupercapacitor using butyltrimethylammonium bis((trifluoromethyl)sulfonyl)imide aprotic ionic liquid as the electrolyte.

3D hierarchical assembly of ultrathin MnO2 nanoflakes on silicon nanowires for high performance micro-supercapacitors in Li- doped ionic liquid.

Building of hierarchical core-shell hetero-structures is currently the subject of intensive research in the electrochemical field owing to its potential for making improved electrodes for high-performance micro-supercapacitors. Here we report a novel architecture design of hierarchical MnO2@silicon nanowires (MnO2@SiNWs) hetero-structures directly supported onto silicon wafer coupled with Li-ion doped 1-Methyl-1-propylpyrrolidinium bis(trifluromethylsulfonyl)imide (PMPyrrBTA) ionic liquids as electrolyte for micro-supercapacitors. A unique 3D mesoporous MnO2@SiNWs in Li-ion doped IL electrolyte can be cycled reversibly across a voltage of 2.

Tensile strained germanium nanowires measured by photocurrent spectroscopy and X-ray microdiffraction.

Applying tensile strain in a single germanium crystal is a very promising way to tune its bandstructure and turn it into a direct band gap semiconductor. In this work, we stress vapor-liquid-solid grown germanium nanowires along their [111] axis thanks to the strain tranfer from a silicon nitride thin film by a microfabrication process. We measure the Γ-LH direct band gap transition by photocurrent spectrometry and quantify associated strain by X-ray Laue microdiffraction on beamline BM32 at the European Synchrotron Radiation Facility.

Highly organised and dense vertical silicon nanowire arrays grown in porous alumina template on <100> silicon wafers.

In this work, nanoimprint lithography combined with standard anodization etching is used to make perfectly organised triangular arrays of vertical cylindrical alumina nanopores onto standard <100>-oriented silicon wafers. Both the pore diameter and the period of alumina porous array are well controlled and can be tuned: the periods vary from 80 to 460 nm, and the diameters vary from 15 nm to any required diameter. These porous thin layers are then successfully used as templates for the guided epitaxial growth of organised mono-crystalline silicon nanowire arrays in a chemical vapour deposition chamber.

Ultradense and planarized antireflective vertical silicon nanowire array using a bottom-up technique.

The production and characterization of ultradense, planarized, and organized silicon nanowire arrays with good crystalline and optical properties are reported. First, alumina templates are used to grow silicon nanowires whose height, diameter, and density are easily controlled by adjusting the structural parameters of the template. Then, post-processing using standard microelectronic techniques enables the production of high-density silicon nanowire matrices featuring a remarkably flat overall surface.

Micro-ultracapacitors with highly doped silicon nanowires electrodes.

Highly n-doped silicon nanowires (SiNWs) with several lengths have been deposited via chemical vapor deposition on silicon substrate. These nanostructured silicon substrates have been used as electrodes to build symmetrical micro-ultracapacitors. These devices show a quasi-ideal capacitive behavior in organic electrolyte (1 M NEt4BF4 in propylene carbonate).

Multifunctional devices and logic gates with undoped silicon nanowires.

We report on the electronic transport properties of multiple-gate devices fabricated from undoped silicon nanowires. Understanding and control of the relevant transport mechanisms was achieved by means of local electrostatic gating and temperature-dependent measurements. The roles of the source/drain contacts and of the silicon channel could be independently evaluated and tuned.

Joule-assisted silicidation for short-channel silicon nanowire devices.

We report on a technique enabling electrical control of the contact silicidation process in silicon nanowire devices. Undoped silicon nanowires were contacted by pairs of nickel electrodes, and each contact was selectively silicided by means of the Joule effect. By a real-time monitoring of the nanowire electrical resistance during the contact silicidation process we were able to fabricate nickel-silicide/silicon/nickel-silicide devices with controlled silicon channel length down to 8 nm.

Growth and characterization of gold catalyzed SiGe nanowires and alternative metal-catalyzed Si nanowires.

The growth of semiconductor (SC) nanowires (NW) by CVD using Au-catalyzed VLS process has been widely studied over the past few years. Among others SC, it is possible to grow pure Si or SiGe NW thanks to these techniques. Nevertheless, Au could deteriorate the electric properties of SC and the use of other metal catalysts will be mandatory if NW are to be designed for innovating electronic.

Size effects in mechanical deformation and fracture of cantilevered silicon nanowires.

Elastic modulus and fracture strength of vertically aligned Si [111] nanowires (ø = 100-700 nm) in an as-grown state have been measured using a new, multipoint bending protocol in an atomic force microscope. All wires showed linear elastic behavior, spring constants which scale with (length)(3), and brittle failure at the wire-substrate junction. The "effective" Young's modulus increased slightly (100 --> 160-180 GPa) as wire diameter decreased, but fracture strength increased by 2-3 orders of magnitude (MPa --> GPa).

Control of gold surface diffusion on si nanowires.

Silicon nanowires (NW) were grown by the vapor-liquid-solid mechanism using gold as the catalyst and silane as the precursor. Gold from the catalyst particle can diffuse over the wire sidewalls, resulting in gold clusters decorating the wire sidewalls. The presence or absence of gold clusters was observed either by high angle annular darkfield scanning transmission electron microscopy images or by scanning electron microscopy.