Overcoming the Leakage and Contact Resistance Challenges in Highly Scaled PMOS and NMOS Carbon Nanotube Transistors.

In this work, we address the off-state leakage current challenge, while simultaneously demonstrating high drive current per CNT, in NMOS and PMOS carbon nanotube field-effect transistors (CNFETs). Increasing the bandgap from 0.6 to 0.

Sub-Nanometer Interfacial Oxides on Highly Oriented Pyrolytic Graphite and Carbon Nanotubes Enabled by Lateral Oxide Growth.

A new generation of compact and high-speed electronic devices, based on carbon, would be enabled through the development of robust gate oxides with sub-nanometer effective oxide thickness (EOT) on carbon nanotubes or graphene nanoribbons. However, to date, the lack of dangling bonds on sp oriented graphene sheets has limited the high precursor nucleation density enabling atomic layer deposition of sub-1 nm EOT gate oxides. It is shown here that by deploying a low-temperature AlO (LT AlO) process, involving atomic layer deposition (ALD) of AlO at 50 °C with a chemical vapor deposition (CVD) component, a high nucleation density layer can be formed, which templates the growth of a high- dielectric, such as HfO.

Atomically flat and uniform relaxed III-V epitaxial films on silicon substrate for heterogeneous and hybrid integration.

The integration of III-V semiconductors on silicon (Si) substrate has been an active field of research for more than 30 years. Various approaches have been investigated, including growth of buffer layers to accommodate the lattice mismatch between the Si substrate and the III-V layer, Si- or Ge-on-insulator, epitaxial transfer methods, epitaxial lateral overgrowth, aspect-ratio-trapping techniques, and interfacial misfit array formation. However, manufacturing standards have not been met and significant levels of remaining defectivity, high cost, and complex integration schemes have hampered large scale commercial impact.

Scanning tunneling microscopy/spectroscopy study of atomic and electronic structures of In2O on InAs and In0.53Ga0.47As(001)-(4×2) surfaces.

Interfacial bonding geometry and electronic structures of In(2)O on InAs and In(0.53)Ga(0.47)As(001)-(4×2) have been investigated by scanning tunneling microscopy/scanning tunneling spectroscopy (STM/STS).

Electronic properties of adsorbates on GaAs(001)-c(2x8)/(2x4).

A systematic experimental and theoretical study was performed to determine the causes of oxide-induced Fermi level pinning and unpinning on GaAs(001)-c(2 x 8)/(2 x 4). Scanning tunneling spectroscopy (STS) and density functional theory (DFT) were used to study four different adsorbates' (O(2), In(2)O, Ga(2)O, and SiO) bonding to the GaAs(001)-c(2 x 8)/(2 x 4) surface. The STS results revealed that out of the four adsorbates studied, only one left the Fermi level unpinned, Ga(2)O.

Direct and indirect causes of Fermi level pinning at the SiO/GaAs interface.

The correlation between atomic bonding sites and the electronic structure of SiO on GaAs(001)-c(2x8)/(2x4) was investigated using scanning tunneling microscopy (STM), scanning tunneling spectroscopy (STS), and density functional theory (DFT). At low coverage, STM images reveal that SiO molecules bond Si end down; this is consistent with Si being undercoordinated and O being fully coordinated in molecular SiO. At approximately 5% ML (monolayer) coverage, multiple bonding geometries were observed.